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SR. I/O CIRCUIT DESIGN ENGINEER: NVIDIA Corporation

SR. I/O CIRCUIT DESIGN ENGINEER

SR. I/O CIRCUIT DESIGN ENGINEER

RESPONSIBILITIES:
- High speed multi Gb/s I/O interface, PLL, DLL, CDR, interpolator circuit designs
- High speed I/O system level timing budgets, specs and analysis
- Interface level clocking definition for the 2Gb/s and higher DDR memory interface designs
- In-depth understanding of deep submicron,40nm and lower, cmos process related circuit design issues
- Familiarity with device reliability, ESD tests is a plus
- Perform failure analysis, discover design flaws and define solutions
- Knowledge of high speed package, board design issues is a plus.
- Expertise in use of Cadence design tools, various circuit simulators, timing analysis tools a must
- Working knowledge of Verilog, Primetime is preferred
- Experience in lab with measurement equipments is a plus


MINIMUM REQUIREMENTS:
- BSEE, MSEE, PhD is preferred
- Candidate must have 5 or more years of well rounded high speed IO development experience. Experience as a design lead is a plus
- Self-motivated with flair to negotiate and define design specs across various design functions
- A team player with good communication skills

NVIDIA is the world leader in visual computing technologies and the inventor of the GPU, a high-performance processor which generates breathtaking, interactive graphics on workstations, personal computers, game consoles, and mobile devices. NVIDIA serves the entertainment and consumer market with its GeForce® graphics products, the professional design and visualization market with its Quadro® graphics products, and the high-performance computing market with its Tesla™ computing solutions products. NVIDIA is headquartered in Santa Clara, Calif. and has offices throughout Asia, Europe, and the Americas. For more information, visit www.nvidia.com.


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