Hardware Engineer: CebaTech, Inc.

Hardware Engineer IP Blocks

CebaTech develops and markets ESL tools for advanced ASIC, FPGA and SoC design, and uses these tools to create and license high-value IP cores. CebaTech developed the C2R Compiler, the first system-level design tool to unify design modeling, architecture exploration, verification and implementation in a single design methodology capable of supporting full-chip designs. In addition to the C2R Compiler, CebaTech licenses C2R compiler generated IP blocks to hardware developers in high-growth markets, with an initial focus on high-performance IP for the fast evolving storage and networking markets

Position Responsibilities

Responsibilities will include, but not be limited to:

* development of CebaTech's Core IP offerings (Compression, Encryption, Network acceleration offload engines, storage area networking)

* development of test benches for a variety of purposes including IP testing, compiler testing and customer projects

* exploration of hardware architecture and design alternatives

* providing design guidance to the compiler team

Qualifications

* BSEE degree, MSEE/Ph.D. preferred.

* ASIC and/or FPGA design experience desired

* Experience designing hardware using synthesizable Verilog.

* Experience writing complex test benches using system verilog or systemC.

* Experience using hardware simulators, such as, ModelSim

* C or C++ system/embedded software development experience.

* Strong familiarity with Unix/Linux-based development environments.

* Ability to explore and communicate architecture and design alternatives to meet demanding timing requirements.

* A spirit of innovation, risk-taking and continued learning.

To Apply

If you have the qualifications, we want to hear from you. Submit your resume and cover letter to employment@cebatech.com .