Senior Analog IC Designer: Fusion408
| Job ID | 2475 |
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| Company Name | Fusion408 |
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| Job Category | Engineering |
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| Location | Santa Clara, CA • Los Altos, CA |
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| Position Type | Full-Time, Employee |
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| Experience | 2-5 Years Experience |
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| Date Posted | August 12, 2009 (Reposted Nov 17) |
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| View Fusion408 profile and job listings |
ANALOG CONTROL DESIGN DEVELOPMENT DIGITAL ENGINEER ENGINEERING IC LINUX MSEE PROCESS PRODUCT TEST
 
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Job ID: 2475
Company Name: Fusion408
Location: Santa Clara, CA, Los Altos, CA
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Senior Analog IC Designer
Responsibilities
Our next Senior Analog IC Design Engineer will have the responsibilities ranging from front to back end design to the revision, verification, and optimization of analog CMOS ICs that will enable and support our self-referenced all-CMOS clock/timing generation technology. You must also work with our product and test engineers to decide and apply the production test protocols and optimal silicon characterization.
Values
-The model candidate must be able to flourish in a stimulating organization that is fast-paced and also take pleasure in handling the multifaceted engineering problems that come with precision analog IC design.
-A good attitude, capability of working efficiently with a team, and ability to contribute instantly to previous design efforts is vital.
-You must also have the ability to contribute in many ways in broad areas that may include test, IP development, and customer support.
Requirements
-Minimum of MSEE with an additional 2+ years of professional analog IC design is required.
-Ph.D. in electrical engineering is preferable.
-Academic performance of recent graduates will be a major factor in the evaluation process.
-Experience in the design of precision analog CMOS ICs such as low drop-out linear voltage regulators (LDOs), bandgap voltage references, analog temperature sensors, oscillators (LC, RC, or ring), I/O or phase-locked loops (PLLs), low noise op-amps, op-amp based control loops and circuits.
-Familiarity with how the creation of the product may vary and different options that may impact performance of analog ICs.
-Have experience with the industry standard EDA tools that may include the Cadence and/or Mentor Graphics design frameworks and also the operation of both tools on both Linux and Solaris platforms.
-Strong computing skills and knowledge of noise processes in ICs, including timing jitter and phase noise is preferable.
-Knowledge of the characterization of CMOS components with frequency and time domain measurement systems that include phase noise analyzers, digital sampling, spectrum analyzers and real-time oscilloscopes is also highly preferred.
IF INTERESTED AND QUALIFIED, PLEASE SUBMIT YOUR RESUME IN A WORD ATTACHMENT TO Joe@Fusion408.com
If interested in this excellent opportunity, please send your resume in a word attachment to: Joe@Fusion408.com
Want $3,000.00 dollars?
Do you know a friend or colleague who might be a great fit for this position? Fusion408 has the best referral bonus in the business! Refer a friend or colleague, and when we place your referral at this position or any other, you will be handsomely rewarded with a referral bonus of up to $3,000.00! Have a great day, and we look forward to hearing from you soon!
Joe Fox
Fusion408
4848 San Felipe Rd. #150-161
San Jose, CA 95135
408.298.9600 Voice
408.298.9601 Fax
Joe@Fusion408.com
www.Fusion408.com
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